Nintendo 3DS ARM Documentation

Cache Type Register

  • Read only
  • Contains information about the caches and their architecture.
  • Accessible only in privileged mode.
  • Raw value: 0x0F0D2112
Register Bits Function Value
31:29 Reserved b000
28:25 Cache Type b0111
24 Harvard/Unified Cache 1 (defines Harvard cache)
23:22 Reserved b00
21:18 Data Cache Size 3 (4KB)
17:15 Data Cache Associativity 2 (4-way associative)
14 Data Cache Absent 0
13:12 Data Cache Words Per Line b10 (8 words per line)
11:10 Reserved b00
9:6 Instruction Cache Size 4 (8KB)
5:3 Instruction Cache Associativity 2 (4-way associative)
2 Instruction Cache Absent 0
1:0 Instruction Cache Words Per Line b10 (8 words per line)

This register can be accessed via MRC p15,0,Rd,c0,c0,1.